ASIC Verification Contractor
Key Skills Verification engineer with extensive experience in System Verilog and UVM.
Experience with the CHI protocol would be a nice extraThis contractor will work alongside(new hire to the Memory Verification team) The project includes - augment the existing UVM test bench with a CHI bus model from Avery, port existing test sequences to run such that transactions are issued by the CHI bfm, write new test sequences, work with designers to debug failures, etc.
ASIC Verification Contractor Recommended Skills Debugging Testbed System Verilog Apply to this job.
Think you're the perfect candidate? Apply on company site $('.
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Experience with the CHI protocol would be a nice extraThis contractor will work alongside(new hire to the Memory Verification team) The project includes - augment the existing UVM test bench with a CHI bus model from Avery, port existing test sequences to run such that transactions are issued by the CHI bfm, write new test sequences, work with designers to debug failures, etc.
ASIC Verification Contractor Recommended Skills Debugging Testbed System Verilog Apply to this job.
Think you're the perfect candidate? Apply on company site $('.
external-apply-email-saved').
on('click', function (event) window.
ExternalApply = window.
open('/interstitial?jobdid=j3w33z63379tqbfwwc9', 'ExternalApply-j3w33z63379tqbfwwc9'); ); Estimated Salary: $20 to $28 per hour based on qualifications.
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